Data centers are drowning in data, and the old electrical interconnects just can’t keep up. For years, engineers like Dr. Anya Sharma, a lead architect at a hyperscale cloud provider, have been wrestling with copper’s physical limits. Her team was staring down a huge problem: their next-gen AI accelerators were going to demand so much bandwidth that the power consumption and latency from the interconnects alone would kill performance. The fix, which is gaining serious traction, is die-to-die optical interconnects. Lumentum made a big splash with this exact tech at ECOC, showing off a completely different way to move data between chips.
Key Takeaways
- Lumentum’s presentation at ECOC focused on their 400G and 800G optical engines, small die-to-die optical modules built to be integrated right onto chip packages.
- These optical engines solve the power and bandwidth density problems plaguing AI/ML accelerators and HPC by using light instead of traditional electrical traces for chip-to-chip communication.
- The tech delivers way higher data rates and uses far less power per bit than electrical links, which is what’s needed to scale up today’s complex chiplet designs.
- Lumentum’s approach uses its indium phosphide (InP) photonics platform, creating a clear path from today’s co-packaged optics to full in-package integration for tomorrow’s hardware.
The Bottleneck That Almost Broke the Bank
Dr. Sharma’s problem wasn’t special. It was happening everywhere. With every new AI chip generation, the bandwidth needed between processors and memory, or even between different dies in one package, just kept exploding. “We were looking at 200 gigabytes per second (GB/s) per link, then 400 GB/s, and the electrical traces just couldn’t keep up efficiently,” Dr. Sharma said on a recent panel. “The power budget for the interconnects alone was becoming unsustainable, eating into the power available for computation.” Her group had already tried everything, tweaking trace lengths, improving signal integrity, and messing with advanced packaging. Every small win came with a huge jump in cost and complexity. You just can’t easily push terabits of data through copper traces, even over short distances on a circuit board, without running into signal loss, crosstalk, and a ridiculous power bill to drive the signals.
This is where die-to-die optical interconnects come in. Instead of converting electrical signals to optical ones out on the board, the idea is to do it right beside the chip. At the European Conference on Optical Communication (ECOC), Lumentum laid out a pretty convincing plan for this future, showing off their latest optical engines designed specifically for co-packaged and in-package use.
Lumentum’s ECOC Revelation: Optical Engines for the Chiplet Era
Lumentum’s show at ECOC 2026 wasn’t just a slide deck. They had actual hardware. They showed new 400G and 800G optical engines built for direct integration with processors and memory. “What Lumentum showed was a fundamental re-architecture of how we think about chip interconnects,” an analyst from LightCounting, a market research firm that lives and breathes optical communications, pointed out. “They’re bringing the photonics directly to the chip package, which is essential for the scaling we need in AI and high-performance computing.”
Lumentum’s whole strategy is built on its mature indium phosphide (InP) photonics platform. That material system is great for high-speed optics because it can integrate lasers, modulators, and detectors all on one chip. It’s a key advantage over silicon photonics, which usually needs separate, external lasers. Managing external light sources is a packaging nightmare that chip designers would love to get rid of, so having it all on one piece of InP is a big deal.
Dr. Sharma’s team had been watching this space for a while. “The power efficiency numbers Lumentum was quoting for their 400G optical engine, specifically around 5-6 picojoules per bit (pJ/bit), were extremely attractive,” she said. To put that in perspective, fast electrical traces can easily burn through 10-15 pJ/bit or more at similar speeds, and that’s before you even count the power for re-timers and signal conditioners. When you multiply that savings across hundreds of links in an AI accelerator, you free up a ton of power for the actual computing.
From Co-Packaged to In-Package: The Integration Roadmap
Right now, the most direct use for these die-to-die optical engines is in co-packaged optics (CPO), where optical transceivers sit on the same substrate as the main chip, but as separate components. This alone shrinks the electrical path from centimeters down to millimeters which provides a big boost in power savings and lower latency. Lumentum’s modules are designed to take the electrical signals right from the host chip and turn them into light for transmission over tiny optical fibers to other components on the board.
But the real end game, the one that changes everything, is in-package integration. This means embedding the optical parts right inside the chip package itself, maybe even on the same silicon interposer as the processor dies. With that level of integration, the electrical path becomes almost zero, pushing the optical conversion right up against the processing cores. “That’s the holy grail,” Dr. Sharma said. “If we can get true in-package optical, where the optical interface is basically right there next to the core, then we get insane bandwidth density without the power penalty.”
Lumentum’s roadmap from ECOC is clearly building toward this. Their current 400G and 800G engines have a size and power profile that works for CPO now, but they’re obviously designed with an eye on the tighter integration needed for in-package solutions down the road. It’s a practical, step-by-step approach that lets chip designers adopt the tech without taking on a massive, terrifying risk all at once.
The Challenges Remain, But the Path is Clearer
As promising as it is, sticking die-to-die optical tech into chips isn’t easy. There are still major hurdles. How do you manufacture this at scale? How do you make sure it’s reliable inside a hot, vibrating chip package? And how do you standardize the interfaces? Thermal management is a huge one, you’re putting heat-sensitive optics right next to a processor that’s running blazing hot. “The packaging ecosystem needs to evolve just as much as the optical components themselves,” a principal engineer from a major semiconductor foundry mentioned at a recent consortium meeting. “We’re talking about precision alignment of optical fibers, hermetic sealing, and heat dissipation in incredibly confined spaces. It’s not trivial.”
Even with those challenges, the consensus among hyperscalers and AI hardware developers is that optical interconnects are a necessity. To get more computational density with less energy, there isn’t much of a choice. The power wall for electrical interconnects is a real and very expensive problem, and optics are the way around it. A report from Omdia projects the market for co-packaged optics will explode into a multi-billion dollar business by the end of the decade, almost entirely because of AI and data center demand. That’s a pretty strong signal that the industry is betting big on this working.
For Dr. Sharma and her team, Lumentum’s ECOC presentation was a huge validation. They were already betting on CPO for their next AI accelerators, and seeing these new die-to-die optical components just confirmed they were on the right track. The ability to move petabits of data per second inside a server rack with way less power directly translates into more compute cycles for less energy. For her company, that means they can build bigger, more capable AI models without having to build new power plants to run them, a direct impact on their bottom line and their ability to compete.
The Future is Bright: A New Era of Interconnects
This move to die-to-die optical interconnects is a massive architectural shift, on par with the jump from parallel to serial communication ages ago. It totally changes what’s possible inside a chip package by blowing past old limits on bandwidth and power efficiency. Lumentum’s work shown at ECOC 2026 proves the tech is getting ready for primetime, moving out of the lab and into real products. Over the next few years, you’re going to see these optical engines pop up everywhere in high-performance computing, AI hardware, and hyperscale data centers, completely changing how we design our most powerful machines.
This shift to die-level optics is a foundational change that will kick off the next wave of computational innovation, especially for AI where data movement is everything.
What is die-to-die optical interconnect technology?
Die-to-die optical interconnects use light instead of electricity to send data between different semiconductor dies, either in the same chip package or on a shared substrate. Doing this cuts power use way down and lets you pack in a lot more bandwidth compared to old-school electrical traces.
Why is die-to-die optical technology important for AI and high-performance computing?
AI and HPC systems need to shuttle enormous amounts of data between processors and memory. Traditional electrical links just can’t handle the speed without becoming power hogs and creating signal-integrity headaches. Die-to-die optical tech solves this by delivering much higher bandwidth for way less power per bit, which lets us build more powerful, energy-efficient computers.
What is the difference between co-packaged optics (CPO) and in-package integration?
With co-packaged optics (CPO), you place optical transceivers on the same board (substrate) as the processor, but they’re still separate components. In-package integration is the next step, where you embed the optical components right inside the chip package itself, maybe even on the same silicon interposer, for the tightest possible connection and shortest electrical paths.
What materials are used for these advanced optical engines?
Lumentum’s optical engines, like the ones at ECOC, are built on an indium phosphide (InP) photonics platform. InP is great because you can build the lasers, modulators, and detectors all on a single chip (monolithically), which makes the design and manufacturing much simpler for high-speed optics.
What are the main benefits of using optical interconnects over electrical ones at the die level?
The biggest benefits are a huge drop in power consumption per bit and much higher bandwidth density without causing heat problems. Optical links also have lower latency and aren’t affected by electromagnetic interference, which are major wins when you’re trying to scale up complex, multi-die systems.
